It is often necessary to sample analog or digital data in a variety of fields. Generally, an analog or digital signal containing data is sampled at a periodic rate to obtain samples corresponding to the amplitude of the signal at equally spaced apart points in time. These samples are then processed, such as by saving the samples for future use. In some instances, the samples are processed sequentially after they have been saved, and in other situations the samples are processed simultaneously after they have been saved.
One example of a prior art sampling system in which a signal containing analog or digital data is sampled and then simultaneously processed is in drive circuits for matrix displays, such as field emission displays. Matrix displays are typically arranged in a array of rows and columns which are perpendicular to each other on a display screen. Generally, each row is sequentially selected, and each column in the selected row is then modulated to control the intensity of a corresponding pixel located at the intersection of the selected row and the corresponding column. Thus, for example, 500 equally spaced samples of a video signal may be obtained and used to modulate 500 respective columns of a N.times.500 matrix display. The first sample of the video signal is used to control the intensity of the leftmost pixel in the selected row while the last sample of the video signal is used to control the intensity of the rightmost pixel in the selected row.
One type of sampling system 10 that can be used to obtain samples of a video signal is illustrated in FIG. 1. The system 10 of FIG. 1 includes a sample and hold circuit 12 having an input line 13, an output line 14 and a clock input line 16. An analog or digital data signal is applied to the input line 13. The sample and hold circuit 12 outputs a sample of the data signal on line 14 for each leading edge of a clock signal 100 applied to the clock input line 16. The samples on line 14 are applied to a series of shift registers 20-28. The shift registers 20-28 each have a clock input line 30 that is simultaneously driven by the same clock signal .phi. that drives the sample and hold circuit 12 through line 16. The shift registers each have an input line 32 and an output line 34. The sampling circuit 10 operates as described below to simultaneously output on the output lines 34 respective samples S.sub.1, S.sub.2, S.sub.3 . . . S.sub.N-1 and S.sub.N of the data signal applied to the input line 13 of the sample and hold circuit 12.
The operation of the sampling circuit shown in FIG. 1 is best explained with reference to FIG. 2. The upper portion of FIG. 2 shows an analog data signal while the lower portion of FIG. 2 shows the clock signal .phi.. As illustrated in FIG. 2, the clock signal has a frequency of 100 MHz, corresponding to a clock period of 10 nanoseconds. As explained above, the sample and hold circuit 12 takes a sample of the data signal on each leading edge of the clock signal .phi.. Thus, the sample and hold circuit 12 samples the data input signal at times t.sub.1, t.sub.2, t.sub.3 . . . t.sub.N- 1 and t.sub.n. The sample S.sub.1 taken at time t.sub.1 is first shifted into the first shift register 20. At time .sub.t2, the first sample S.sub.1 is shifted into the second shift register 22 while the second sample S.sub.2 is shifted into the first shift register 20. The sampling circuit 10 continues to operate in that manner until the first sample S.sub.1 taken at time t.sub.1 has been shifted to the last shift register 28. At that time, sample S.sub.1 is being output from the shift register 28, the second sample S.sub.2 is being output from the N-1 shift register 26, the third sample S.sub.3 is being output from the N-2 shift register 24, the second to last sample is being output from the second shift register 22, and the last sample S.sub.N is being output from the first shift register 20. The samples S.sub.1 -S.sub.N can then be used to drive the columns of a matrix display so that the left pixel of a selected row of the display will have an intensity corresponding to the amplitude of the data signal at time .tau..sub.1. Similarly, the night pixel of the selected row of the display will have an intensity corresponding to the amplitude of the data signal at time t.sub.N. The intensity of the pixels between the end pixels of the selected row will have intensities corresponding to the amplitude of the data signal at points in time corresponding to their location in the selected row. The sampling circuit 10 can, of course, be used for a wide variety of purposes other than to drive matrix displays.
The prior art approach illustrated in FIGS. 1 and 2 generally has worked satisfactorily up until the present. However, data signals, such as the data signals illustrated at the top of FIG. 2, are more frequently being displayed on matrix displays having a higher resolution. These higher resolution displays have a higher resolution because there is a larger number of columns in the matrix array. As explained above, a sample of the data signal must be obtained for each column of the matrix display. Therefore, higher resolution matrix displays require that the data be sampled at a correspondingly higher rate. For example, the "refresh rate," i. e., the rate at which all of the pixels in a display are modulated, is commonly 60 Hz. A conventional VGA display has 480 lines and 640 columns. Thus, 480 rows must be processed 60 times each second so that the time required to process each row is 34.7 microseconds (i.e., the reciprocal of 60*480). During that 34.7 microseconds, 640 samples of the data signal must be taken, resulting in a sample rate of about 54 nanoseconds. The approach illustrated in FIGS. 1 and 2 has generally been capable of providing samples at that rate. However, higher resolution XGA displays have 768 rows and 1024 columns. With a 60 Hz refresh rate, each row must be processed in a time of 21.7 microseconds. In that 21.7 microseconds, 1024 samples must be taken, resulting in a sample rate of 21.2 nanoseconds. It is currently not economically feasible to use the approach illustrated in FIGS. 1 and 2 to sample at this higher rate. Moreover, the resolution of matrix displays continues to increase so that it is likely that even higher sample rates will be required in the future. The conventional approach to sampling data signals to drive matrix displays is thus not suitable for modern high resolution matrix displays.